woozlewuzzle3@alien.topB to Intel@hardware.watchEnglish · 10 months agoInteresting pattern on 12600kalien.topimagemessage-square9fedilinkarrow-up11arrow-down11file-text
arrow-up10arrow-down1imageInteresting pattern on 12600kalien.topwoozlewuzzle3@alien.topB to Intel@hardware.watchEnglish · 10 months agomessage-square9fedilinkfile-text
minus-squareCubelia@alien.topBlinkfedilinkEnglisharrow-up1·10 months agoApologies, most of the dull ones are ground pins and the shiny ones are signal pins. The unique layout was probably designed for signal integrity.
minus-squaresaratoga3@alien.topBlinkfedilinkEnglisharrow-up1·10 months agoIt’s interesting the extra care they took to route the PCI Express Lanes as compared to the DMI Lanes. They are much more concerned about crosstalk with the lanes that have to go off board and so they put ground pins between each lane
Apologies, most of the dull ones are ground pins and the shiny ones are signal pins. The unique layout was probably designed for signal integrity.
It’s interesting the extra care they took to route the PCI Express Lanes as compared to the DMI Lanes. They are much more concerned about crosstalk with the lanes that have to go off board and so they put ground pins between each lane