drawerair@lemmy.worldEnglish · edit-25 months agoIntel said that its Lion cove is 10%–18% better than Redwood coveplus-squaremessage-squaremessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1message-squareIntel said that its Lion cove is 10%–18% better than Redwood coveplus-squaredrawerair@lemmy.worldEnglish · edit-25 months agomessage-square0fedilink
ylai@lemmy.mlEnglish · 5 months agoASML sets new EUV chipmaking density record, proposes Hyper-NA tools and radical EUV speed boostsplus-squarewww.tomshardware.comexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkASML sets new EUV chipmaking density record, proposes Hyper-NA tools and radical EUV speed boostsplus-squarewww.tomshardware.comylai@lemmy.mlEnglish · 5 months agomessage-square0fedilink
ylai@lemmy.mlEnglish · 6 months ago4500 Fab Jobs Could Go Unfilled in U.S. by 2030plus-squarespectrum.ieee.orgexternal-linkmessage-square3fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-link4500 Fab Jobs Could Go Unfilled in U.S. by 2030plus-squarespectrum.ieee.orgylai@lemmy.mlEnglish · 6 months agomessage-square3fedilink
ylai@lemmy.mlEnglish · 7 months agoTSMC’s debacle in the American desertplus-squarerestofworld.orgexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkTSMC’s debacle in the American desertplus-squarerestofworld.orgylai@lemmy.mlEnglish · 7 months agomessage-square0fedilink
ylai@lemmy.mlEnglish · 8 months agoIntel Receives ASML’s First High NA EUV systemplus-squarewww.youtube.comexternal-linkmessage-square0fedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkIntel Receives ASML’s First High NA EUV systemplus-squarewww.youtube.comylai@lemmy.mlEnglish · 8 months agomessage-square0fedilink
ylai@lemmy.mlEnglish · 9 months agoMeta seeks ASIC designers for ML accelerators and datacenter SoCs – Appears to be struggling to find them, even in India, as it's re-posted job adsplus-squarewww.theregister.comexternal-linkmessage-square0fedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-linkMeta seeks ASIC designers for ML accelerators and datacenter SoCs – Appears to be struggling to find them, even in India, as it's re-posted job adsplus-squarewww.theregister.comylai@lemmy.mlEnglish · 9 months agomessage-square0fedilink
ylai@lemmy.mlEnglish · 10 months agoChip Packaging Trumps EDA: Why Synopsys Is Paying $35 Billion For Ansysplus-squarewww.nextplatform.comexternal-linkmessage-square0fedilinkarrow-up13arrow-down10
arrow-up13arrow-down1external-linkChip Packaging Trumps EDA: Why Synopsys Is Paying $35 Billion For Ansysplus-squarewww.nextplatform.comylai@lemmy.mlEnglish · 10 months agomessage-square0fedilink
ylai@lemmy.mlEnglish · 10 months agoSynopsys to acquire graphics software maker Ansys in $35 billion tech dealplus-squarewww.cnbc.comexternal-linkmessage-square0fedilinkarrow-up16arrow-down13
arrow-up13arrow-down1external-linkSynopsys to acquire graphics software maker Ansys in $35 billion tech dealplus-squarewww.cnbc.comylai@lemmy.mlEnglish · 10 months agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 10 months agoPolynomial Formal Verification: Verification-Centric Strategyplus-squareagra.informatik.uni-bremen.deexternal-linkmessage-square0fedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-linkPolynomial Formal Verification: Verification-Centric Strategyplus-squareagra.informatik.uni-bremen.dehardware26@discuss.tchncs.deEnglish · 10 months agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 10 months ago5 Steps to Confront the Talent Shortage With IP-Centric Designplus-squarewww.eetimes.comexternal-linkmessage-square0fedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-link5 Steps to Confront the Talent Shortage With IP-Centric Designplus-squarewww.eetimes.comhardware26@discuss.tchncs.deEnglish · 10 months agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 11 months agoIt’s the manufacturing, stupid!plus-squarebits-chips.nlexternal-linkmessage-square0fedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkIt’s the manufacturing, stupid!plus-squarebits-chips.nlhardware26@discuss.tchncs.deEnglish · 11 months agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoChip Industry Talent Shortage Drives Academic Partnershipsplus-squaresemiengineering.comexternal-linkmessage-square0fedilinkarrow-up13arrow-down10
arrow-up13arrow-down1external-linkChip Industry Talent Shortage Drives Academic Partnershipsplus-squaresemiengineering.comhardware26@discuss.tchncs.deEnglish · 1 year agomessage-square0fedilink
ylai@lemmy.mlEnglish · 1 year agoGoogle's Controversial AI Chip Paper Under Scrutiny Againplus-squarewww.hpcwire.comexternal-linkmessage-square1fedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkGoogle's Controversial AI Chip Paper Under Scrutiny Againplus-squarewww.hpcwire.comylai@lemmy.mlEnglish · 1 year agomessage-square1fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoUsing LLMs to Facilitate Formal Verification of RTLplus-squarearxiv.orgexternal-linkmessage-square0fedilinkarrow-up14arrow-down11
arrow-up13arrow-down1external-linkUsing LLMs to Facilitate Formal Verification of RTLplus-squarearxiv.orghardware26@discuss.tchncs.deEnglish · 1 year agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoGrowing full wafers of high-performing 2D semiconductor that integrates with state-of-the-art chipsplus-squaretechxplore.comexternal-linkmessage-square0fedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkGrowing full wafers of high-performing 2D semiconductor that integrates with state-of-the-art chipsplus-squaretechxplore.comhardware26@discuss.tchncs.deEnglish · 1 year agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoTest Strategies In The Era Of Heterogeneous Integrationplus-squaresemiengineering.comexternal-linkmessage-square0fedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkTest Strategies In The Era Of Heterogeneous Integrationplus-squaresemiengineering.comhardware26@discuss.tchncs.deEnglish · 1 year agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoUse Cases And Value Proposition Of eFPGA (Embedded FPGA)plus-squaresemiengineering.comexternal-linkmessage-square2fedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkUse Cases And Value Proposition Of eFPGA (Embedded FPGA)plus-squaresemiengineering.comhardware26@discuss.tchncs.deEnglish · 1 year agomessage-square2fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoChallenges In Ramping New Manufacturing Processesplus-squarewww.youtube.comexternal-linkmessage-square0fedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-linkChallenges In Ramping New Manufacturing Processesplus-squarewww.youtube.comhardware26@discuss.tchncs.deEnglish · 1 year agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoCadence Collaborates with Arm to Accelerate Neoverse V2 Data Center Design Success with Cadence AI-driven Flowsplus-squarewww.cadence.comexternal-linkmessage-square0fedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-linkCadence Collaborates with Arm to Accelerate Neoverse V2 Data Center Design Success with Cadence AI-driven Flowsplus-squarewww.cadence.comhardware26@discuss.tchncs.deEnglish · 1 year agomessage-square0fedilink
hardware26@discuss.tchncs.deEnglish · 1 year agoThe dream of a chiplet marketplace is still a long way offplus-squarewww.google.comexternal-linkmessage-square0fedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkThe dream of a chiplet marketplace is still a long way offplus-squarewww.google.comhardware26@discuss.tchncs.deEnglish · 1 year agomessage-square0fedilink
